Reading the Tea Leaves in Hyperscaler Capex

Advanced packaging is the constraint hiding behind the constraint. Even when a foundry can print the logic, the number of chips that ship is gated by the capacity to bond memory stacks onto the compute die — and that line is booked out quarters in advance. The packaging vendors quietly set the ceiling on how fast supply can grow.

There is a persistent gap between what a model can do in a demo and what an enterprise will actually deploy. Procurement cycles are long, security reviews are longer, and the switching costs — once a workflow is embedded — cut both ways. The lesson is that adoption is slow to arrive and slow to leave.

The interesting tell in a model launch is what the provider chooses not to charge for.